In recent years and continuing, electric interfaces used in personal computers and servers, etc., are rapidly changing from parallel interfaces to serial interfaces. For example, PCI, ATA, and SCSI, which are parallel interfaces, are changing to PCI Express, Serial ATA, and Serial Attached SCSI, respectively. Furthermore, the transmission frequency in serial interfaces is rapidly increasing. Thus, there is demand for a wiring substrate which has been designed with further consideration of material properties, and which is adaptable to high transmission frequency.
A description is given of an example of a conventional wiring substrate, with reference to accompanying drawings. FIG. 1 is a transparent plan view of main parts of a conventional wiring substrate. FIG. 2 is a cross-sectional view of main parts of the conventional wiring substrate. A wiring pattern 12 and insulating resin 14 illustrated in FIG. 2 are not illustrated in FIG. 1. FIG. 2 is a cross-sectional view cut along a line B-B in FIG. 1.
As illustrated in FIGS. 1 and 2, a conventional wiring substrate 100 includes a prepreg layer 11, the wiring pattern 12, and wiring patterns 130. The wiring patterns 130 are referred to as wiring patterns 130A through 130D.
In the wiring substrate 100, the wiring pattern 12 is formed substantially entirely on one surface (first surface) 11A of the prepreg layer 11. Furthermore, the wiring patterns 130 are formed on selected portions of the other surface (second surface) 11B of the prepreg layer 11. The wiring patterns 130 are conducting bodies through which predetermined electric signals flow. The wiring pattern 12 is a conducting body acting as a return circuit of the predetermined electric signals flowing through the wiring patterns 130.
The prepreg layer 11 includes the insulating resin 14 and a glass cloth 15. The glass cloth 15 is impregnated with the insulating resin 14. The glass cloth 15 includes glass fiber bundles 16 that are disposed in a direction parallel to an X axis and glass fiber bundles 17 that are disposed in a direction parallel to a Y axis. The glass fiber bundles 16 and the glass fiber bundles 17 are plain-woven in a lattice-like manner. For example, each of the glass fiber bundles 16 and 17 is formed by bundling together plural glass fibers that have a width of several μm, so that each of the glass fiber bundles 16 and 17 has a width of approximately several hundred μm. Gap portions 15X are gaps between the glass fiber bundles 16 and 17. The gap portions 15X are filled with the insulating resin 14.
The wiring pattern 130A is formed at a position overlapping one of the glass fiber bundles 17 in a planar view from the second surface 11B of the prepreg layer 11. The wiring pattern 130B is formed at a position overlapping a gap portion adjacent to the glass fiber bundle 17 on which the wiring pattern 130A is formed, in a planar view from the second surface 11B of the prepreg layer 11. The wiring patterns 130C and 130D are formed in a diagonal manner so as not to be parallel with any of the glass fiber bundles 16 and 17 in a planar view from the second surface 11B of the prepreg layer 11. That is to say, the wiring patterns 130A through 130D include parts that are formed at positions overlapping the glass fiber bundles 16 or 17 and parts that are formed on the gap portions 15X that are gaps formed between the glass fiber bundles 16 and 17, in a planar view of the prepreg layer 11.
As indicated in Table 1, the relative permittivity and the dielectric dissipation factor vary depending on whether the wiring patterns 130 (wiring patterns 130A through 130D) are located on the glass fiber bundles 16 or 17 or on the gap portions 15X. When there is a large variation in the relative permittivity in a part where a wiring pattern is formed, the impedance and the propagation delay time vary. When there is a large variation in the dielectric dissipation factor in a part where a wiring pattern is formed, the insertion loss increases. When there are variations in the impedance, variations in the dielectric dissipation factor, and increases in the insertion loss, high frequency signal transmission in a wiring substrate is may not be properly implemented. Therefore, variations in the impedance, variations in the dielectric dissipation factor, and increases in the insertion loss are to be minimized.
TABLE 1DIELECTRICPOSITION OFRELATIVEDISSIPATIONWIRING PATTERNPERMITTIVITYFACTORON GLASS FIBER BUNDLE LARGESMALL16 OR 17ON GAP PORTION 15XSMALLLARGE
The information in Table 1 is applied to the wiring patterns 130A and 130B. The wiring pattern 130A is formed only on the glass fiber bundle 17 (on a position overlapping the glass fiber bundle 17 in a planar view). Therefore, the relative permittivity and the dielectric dissipation factor are fixed and do not vary in a part where the wiring pattern 130A is formed. Accordingly, in the wiring pattern 130A, there are no variations in the impedance or the dielectric dissipation factor, and the insertion loss decreases, such that high frequency signal transmission is implemented with good performance. Thus, the wiring pattern 130A is located at an ideal position.
Meanwhile, the wiring pattern 130B is formed on the glass fiber bundles 16 or 17 (on positions overlapping the glass fiber bundles 16 or 17 in a planar view), as well as on the gap portions 15X (on positions overlapping the gap portions 15X in a planar view). Therefore, the wiring pattern 130B alternately passes over parts where the relative permittivity is large and the dielectric dissipation factor is small, and parts where the relative permittivity is small and the dielectric dissipation factor is large. Accordingly, when a current flows through the wiring pattern 130B, the impedance and the propagation delay time vary, and the insertion loss increases, such that high frequency signal transmission is implemented with bad performance.
There are cases where the wiring patterns 130A and 130B are used for transmitting differential signals. Differential signals include POS signals and NEG signals obtained by inverting POS signals, and are particularly used for high frequency signal transmission. For example, POS signals flow through the wiring pattern 130A, and NEG signals flow through the wiring pattern 130B that is disposed in parallel with the wiring pattern 130A. If the variation in the impedance, the variation in the propagation delay time, and the insertion loss are the same for the wiring patterns 130A and 130B, high frequency signal transmission is implemented with good performance.
However, as described above, in the wiring pattern 130A, there are no variations in the impedance or the propagation delay time, and the insertion loss is small. Meanwhile, in the wiring pattern 130B, there are variations in the impedance and the propagation delay time, and the insertion loss is large. Consequently, if the wiring patterns 130A and 130B are used for transmitting differential signals, the balance between the wiring patterns 130A and 130B (balance between POS signals and NEG signals) is disrupted, and therefore high frequency signal transmission is implemented with bad performance. Similarly, when the wiring patterns 130C and 130D are used for transmitting differential signals, the balance between the wiring patterns 130C and 130D (balance between POS signals and NEG signals) is disrupted, and therefore high frequency signal transmission is implemented with bad performance.
As described above, when two wiring patterns are used for transmitting differential signals, but only one of the wiring patterns is located at an ideal position in consideration of high frequency signal transmission, high frequency signal transmission is not be implemented with good performance. That is to say, when wiring patterns are used for transmitting differential signals, both of the parallel wiring patterns are to be located at ideal positions in consideration of high frequency signal transmission, so that high frequency signal transmission is implemented with good performance. An “ideal position in consideration of high frequency signal transmission” means that the wiring pattern is formed only on positions overlapping a part of the glass cloth 15 (i.e., not on positions overlapping any of the gaps) in a planar view of the prepreg layer 11.
Next, the wiring patterns 130C and 130D are discussed. Similar to the wiring pattern 130B, the wiring patterns 130C and 130D are formed on the glass fiber bundles 16 or 17 (on positions overlapping the glass fiber bundles 16 or 17 in a planar view), as well as on the gap portions 15X (on positions overlapping the gap portions 15X in a planar view). Therefore, each of the wiring patterns 130C and 130D alternately passes over parts where the relative permittivity is large and the dielectric dissipation factor is small, and parts where the relative permittivity is small and the dielectric dissipation factor is large. However, compared to the case of wiring pattern 130B, the positions on which the wiring patterns 130C and 130D are formed include more parts overlapping the glass fiber bundles 16 or 17 and fewer parts overlapping the gap portions 15X. Consequently, the difference between the wiring patterns 130C and 130D is smaller than the difference between the wiring patterns 130A and 130B in terms of propagation delay time. Therefore, with the wiring patterns 130C and 130D, high frequency signal transmission is implemented with better properties than those of the wiring patterns 130A and 130B.
Accordingly, in a conventional wiring substrate, the difference in propagation delay time between wiring patterns is reduced by disposing the wiring patterns in diagonal directions with respect to the horizontal and vertical directions of the glass fiber bundles in a planar view (see, for example, Japanese Laid-Open Patent Application No. 2008-171834).
In the above-described conventional wiring substrate (with diagonal wiring patterns), more parts of the wiring patterns are located on positions overlapping the glass fiber (as compared with horizontal or vertical diagonal wiring patterns); however, there still remain parts where the wiring patterns are located on gaps between the glass fibers. The relative permittivity and the dielectric dissipation factor are different for parts on the glass fiber of the wiring substrate and parts on the gaps. Thus, when a wiring pattern is located on both the glass fiber and gaps between the glass fibers, and a current flows through such a wiring pattern, variations in the impedance, variations in the propagation delay time, and the insertion loss may not be sufficiently mitigated.